1. Field
Various features disclosed herein pertain to wireless communication systems, and at least some features pertain to devices and methods for facilitating performance level management for a processing circuit in an access terminal.
2. Background
Access terminals, such as laptop computers, personal digital assistant devices, mobile or cellular phones, or any other device with a processor, that communicate with other devices through wireless signals are becoming increasingly popular. Access terminals are typically battery-powered and the amount of power a battery can provide is limited. With consumers using powerful applications that run on the client terminals, particularly entertainment media and imaging applications, conserving battery power is important.
One technique often used in computer architecture for conserving power and/or reducing the temperature of a processor includes managing a performance level of one or more processors. For example, the performance level of a processor may be managed by dynamic frequency scaling and/or dynamic voltage and frequency scaling. Dynamic voltage and frequency scaling is generally implemented in devices having a processor by increasing or decreasing the clocking frequency of the processor or a combination of the clocking frequency and the voltage supplied to the processor in response to the activity of the processor. For example, the processor and/or memory bus activity may be monitored to determine whether additional or fewer processor resources are needed to meet the current activity rates. When relatively higher processor and/or memory bus activity is measured, the dynamic voltage and frequency scaling function may increase the clock frequency of the processor and/or the voltage supplied to the processor to enable the processor to meet the demands of the increased activity. Conversely, when relatively lower processor and/or memory bus activity is measured, the dynamic voltage and frequency scaling function may reduce the clock frequency of the processor and/or the voltage supplied to the processor. Such reductions in frequency and/or voltage may result in reduced power consumption by the processor, as power is dissipated by a processor according to the equation C·V2·f, where C is the capacitance being switched per clock cycle, V is voltage, and f is the switching frequency.
Such a conventional dynamic voltage and frequency scaling function which monitors the processor and memory bus activity may be capable of reducing power consumption in access terminals. However, such a conventional dynamic voltage and frequency scaling function may not perform optimally in high speed data transmission scenarios, such as high-speed calls. For example, in modern high speed data call scenarios, data may be transferred between an access terminal and an access node over relatively short periods of time. If data remains for too long on a buffer at an access terminal (e.g., is not moved quickly enough from a buffer having limited storage capacity to a storage medium having a larger storage capacity), the data may be partially overwritten by subsequent data received at the access terminal, resulting in the loss of data. Similarly, if data is not processed quickly enough for transmission, the access terminal may miss a transmission deadline, potentially leading to system instability. In some conventional data transmission scenarios, only a few milliseconds may be available to process data before data is lost or transmission deadlines are missed.
Conventional dynamic voltage and frequency scaling functions relying on measurements of processor and memory bus activity levels may have relatively slow responsiveness in adjusting processor performance levels.
Therefore, there is a need for a solution that more efficiently manages a processor's performance level, e.g., during high speed data transmission/reception scenarios, by identifying a change in processor requirements and enabling relatively quick responsiveness in adjusting the processor's performance level to meet the changed processor requirements.